Job Responsibilities:

Be the subject expert for system-on-chip (SoC) internal architectures to maximize ECU hardware design efficiency/performance in ADAS and Infotainment applications
Work proactively with silicon vendor partners to drive future features and solutions
Be the reference for the SoC IP blocks and design tradeoffs:  ARM, RISC-V, GPU, DSP, ISP, NPU, MMA, HW accelerators 
Be the reference for the best-in-class ISO26262 and Cyber Security implementations
Support HW Engineering group during advanced design phases, system architecture definitions and ECU development / Qualifications
Be the interface within the organization between the HW Engineering and the Semiconductor groups for high level SoC specifications
Drive internal SoC roadmap definitions by regularly providing survey study of the relevant industry technologies and SoC solutions
Be the reference for FPGA definition and usages
Basic Qualifications

Experience in Silicon SoC Design for embedded electronics or mixed experience of design, SoC architecture, and TIER2 AE/FAE role
Experience in EE architecture topologies, software architecture, Functional safety
Track record of first-pass success in ASIC development
Strong teamwork spirit; excellent oral and written communication skills; ability to work independently within a global team environment 
Experience with Silicon Design suite tools
Familiar with industry standards for chip design methodologies and verification
 

Preferred Qualifications

Experienced in industrial or automotive (preferred) market
Justified experience in ARM 32/64bits architecture, power management, high speed communication interfaces, memories, video and audio interfaces
Justified experience in HW segregation, Neural Networks, hypervisor technologies
Experience in defining micro-architecture specifications
Familiar with 3rd party IPs and SoC integration
Experience with RISC-V and Chiplet technology is a plus
Solid understanding of embedded electronics design constraints at the component and system level

Job Responsibilities:

Be the subject expert for system-on-chip (SoC) internal architectures to maximize ECU hardware design efficiency/performance in ADAS and Infotainment applications
Work proactively with silicon vendor partners to drive future features and solutions
Be the reference for the SoC IP blocks and design tradeoffs:  ARM, RISC-V, GPU, DSP, ISP, NPU, MMA, HW accelerators 
Be the reference for the best-in-class ISO26262 and Cyber Security implementations
Support HW Engineering group during advanced design phases, system architecture definitions and ECU development / Qualifications
Be the interface within the organization between the HW Engineering and the Semiconductor groups for high level SoC specifications
Drive internal SoC roadmap definitions by regularly providing survey study of the relevant industry technologies and SoC solutions
Be the reference for FPGA definition and usages
Basic Qualifications

Experience in Silicon SoC Design for embedded electronics or mixed experience of design, SoC architecture, and TIER2 AE/FAE role
Experience in EE architecture topologies, software architecture, Functional safety
Track record of first-pass success in ASIC development
Strong teamwork spirit; excellent oral and written communication skills; ability to work independently within a global team environment 
Experience with Silicon Design suite tools
Familiar with industry standards for chip design methodologies and verification
 

Preferred Qualifications

Experienced in industrial or automotive (preferred) market
Justified experience in ARM 32/64bits architecture, power management, high speed communication interfaces, memories, video and audio interfaces
Justified experience in HW segregation, Neural Networks, hypervisor technologies
Experience in defining micro-architecture specifications
Familiar with 3rd party IPs and SoC integration
Experience with RISC-V and Chiplet technology is a plus
Solid understanding of embedded electronics design constraints at the component and system level